Faculty Details
Name Prof. D Krishnaveni
Designation Assistant Professor & HOD
Educational Qualification M.Tech
Work Experience
     - Teaching
     - Research
     - Industry
     - Others
18.5 years


Area of Specialization Electronics
Subjects teaching at Under Graduate level. Basic Electronics, Logic Design, Analog Electronic Circuits, Signals & Systems,
VLSI, Microprocessors, Hardware Description Languages, Digital Signal Processing,
Microwave & Radar, Digital Signal Processing Algorithms & Architecture
E-mail ID mailkveni@gmail.com
Phone Number
Any other Achievements
Paper Presented / Published 1) A New Leakage Power reduction Technique for CMOS VLSI Circuits M.Geetha Priya, Dr.K.Baskaran, D.Krishnaveni, S Srinivasan Journal of Artificical Intelligance, ISSN: 1994-5450, Vol 5, Issue 4, 2012, Pg no. 227-232.

2) A Novel Design of Reversible Universal Shift Register with Reduced Delay and Quantum Cost: D. Krishnaveni, M. Geetha Priya Journal of Computing, ISSN: 2151-9617, Vol 4, Issue 2, Feb 2012, Pg no. 164-173.

3) A Novel Leakage Power Reduction Technique for CMOS VLSI Circuits M. Geetha Priya, K. Baskaran, D. Krishnaveni European Journal of Scientific Research, ISSN: 1450-216X, Vol 74, Issue 1, 2012, Pg no. 96-105.

4) International Conference on Emerging trends in technology (NCET-Tech) (Nagarjuna College of Engineering and technology) 2012 VLSI Implementation Of Vedic Multiplier With Reduced Delay: Krishnaveni D., Umarani T.G.

5) VLSI Implementation Of Vedic Multiplier With Reduced Delay: Krishnaveni D., Umarani T.G. international Journal of Advanced Technology & Engineering Research, ISSN: 2250-3536, Vol 2, Issue 4, July 2012, Pg no. 10-14.

6) Design of an Efficient Reversible 8x8 Wallace Tree Multiplier: D. Krishnaveni, M. Geetha Priya and K. Baskaran World Applied Sciences Journal, ISSN: 1818-4952, Vol 20, Issue 8, 2012, Pg no. 1159-1165.